SECTION 02 / 5

Decoders

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Start here A hotel has 8 rooms and a 3-digit binary room code. When the code 101 comes in, only room 5’s light should turn on, and every other light stays off. A circuit that does this is called a decoder: it turns a code into “exactly one line on”.

The code 101 lights up exactly one room: room 5. That’s what a decoder does.
The code 101 lights up exactly one room: room 5. That’s what a decoder does.
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One code, one room

What a decoder does

  • n inputs → 2ⁿ outputs.
  • For each input pattern, exactly one output is 1, and all the rest are 0.
  • The output that turns on is the one whose number matches the input.

Names: a decoder with 2 inputs is a 2:4 decoder (or 2-to-4). With 3 inputs it’s a 3:8 decoder. With 4 inputs it’s a 4:16 decoder.

The 2:4 decoder

Each output is one AND gate. Each AND gate is a minterm detector.
Each output is one AND gate. Each AND gate is a minterm detector.
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2-to-4 decoder
A B D0D_{0} D1D_{1} D2D_{2} D3D_{3}
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1

Equations: D0=A‾B‾,D1=A‾B,D2=AB‾,D3=ABD_{0} = \overline{A} \overline{B} , D_{1} = \overline{A} B , D_{2} = A \overline{B} , D_{3} = A B.

Key idea: each decoder output is a minterm. Dk=mkD_{k} = m_{k}.

Lecture example — A=1,B=0A = 1 , B = 0 Input pattern 10 is the number 2, so only D2=1D_{2} = 1. The outputs are 0, 0, 1, 0.

Where decoders are used

  • Memory addresses: the processor sends a row number; a decoder switches on that one row of memory.
  • Instructions: the processor reads an instruction’s opcode (the part that says which operation); a decoder turns on the one circuit that does that operation.

A decoder can build ANY function

Since every decoder output is a minterm, you can make any function of n variables:

  1. Connect the variables to the decoder inputs.
  2. Find the minterms where F=1F = 1.
  3. OR those outputs together.
F=Σm(2,3,5,6)F = \Sigma m \left(2 , 3 , 5 , 6\right): connect outputs D2,D3,D5D_{2} , D_{3} , D_{5} and D6D_{6} to one OR gate.
F=Σm(2,3,5,6)F = \Sigma m \left(2 , 3 , 5 , 6\right): connect outputs D2,D3,D5D_{2} , D_{3} , D_{5} and D6D_{6} to one OR gate.
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Decoder plus OR makes any function

Lecture exercise — Y=A+B+C+DY = A + B + C + D Y is 1 in every row except row 0 (0000). So Y=D1+D2+…+D15Y = D_{1} + D_{2} + \ldots + D_{15} (an OR of 15 outputs). Smarter: Y=Y = NOT⁡D0\operatorname{NOT} D_{0}. One inverter on D0D_{0} does the same job.

Trick: if F has many 1s, use the 0s instead: F=NOT⁡F = \operatorname{NOT}(OR of the 0-row outputs). That is a NOR gate.

Decoder delay

Inside a decoder, each input goes through a NOT (for the barred letters), then an AND gate. So the longest path is:

delay = NOT delay + AND delay

The slowest path: input → NOT → AND → output.
The slowest path: input → NOT → AND → output.
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Decoder delay path
  • 4:16 decoder with NOT⁡=1\operatorname{NOT} = 1 ns and 4-input AND⁡=2\operatorname{AND} = 2 ns → 1 + 2 = 3 ns.
  • 3:8 decoder built from NOT and 2-input ANDs (all 1 ns): a 3-input AND needs two 2-input ANDs in a chain. So 1 + 1 + 1 = 3 ns.

In one line: A decoder has n inputs and 2ⁿ outputs; exactly one output is 1, and each output is a minterm, so decoder + OR gate can build any function. Exam words: decoder, 2:4, 3:8, 4:16, one-hot output, minterm, memory address, opcode, decoder delay.


Quick check

How many outputs does a 5-input decoder have? 2⁵ = 32.
A 3:8 decoder gets ABC=110A B C = 1 1 0. Which output is 1? D6(110=6)D_{6} \left(1 1 0 = 6\right).
Build F(A,B,C)=Σm(1,7)F \left(A , B , C\right) = \Sigma m \left(1 , 7\right) with a 3:8 decoder. What do you add? One 2-input OR gate joining D1D_{1} and D7D_{7}.
True or false: “In a decoder, exactly one output is 1 at any time.” True. (This exact statement appears in many past papers.)
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